ISSCC 2010 Preview

 

At the 2005 ISSCC, a panel of experts looked beyond the horizon to consider what the hot topics might be in 2010. Did anyone get it right? Let’s see from the panelists’ statements that I have quoted completely out of context.

Werner Weber, Infineon: “Expect new memory concepts to arise and mature.” We seem forever on this precipice without ever taking the plunge. Session 14 Non-volatile Memory offers a mix of the arising (Unity’s CMOx paper) and a couple of the mature with two Numonyx papers on PCRAM. The definition of maturity may be determined by whether Numonyx ships 1G samples this quarter as predicted.

Dennis Monticelli, National Semiconductor: “The most interesting advances in 2010 will come from CMOS/BiCMOS processes optimized expressly for mixed-signal circuits.” The analog techniques session boasts ten out of ten circuits built on CMOS platforms.

Bill Redman White: “Connectivity in general stays a big driver with the hot wire/less standard of the day getting the limelight, while bio/medical will grow.” This was a safe bet since we always seem to have more data than the pipes can handle. A couple of panels this year could be traced back to this prediction (at least I would if I had made it five years ago). The Monday evening panel addresses Energy-Efficient High-Speed Interfaces while Tuesday’s Can We Rebuild Them? Bionics Beyond 2010 seems to suggest a steadily growing capability in the bio field.

I think you would have to give the 2005 panelists a passing grade for their predictions. To put them into some historical context, we can compare the ISSCC team to what other experts had to say five years ago. “Is There Life Beyond CMOS?” is the question S.M. Solomon of IBM attempted to answer with his presentation at Cornell. It was a time when the challenges to scaling planar CMOS technology were starting to appear insurmountable. With the benefit of clear hindsight, strained silicon channels provided the drive current boost that dimensional scaling could not. This was followed by the introduction of metal gates and high-K dielectrics to avoid bouncing off the electrostatics brick wall for control of the FET channel. MUGFETs and vertical channels have not matured beyond the lab but continue to attract a lot of research attention. FinFETs or something similar are probably still another decade away as III-V channel materials will arrive first.

Reaching back to IEDM 2009, that’s exactly what I was hearing from Intel Fellow, Mike Mayberry. Unfortunately, I did not have the chance to write about my call with Mike during IEDM last December. I suggest it would be more useful to get it from the source anyway. That’s easily done since Dr. Mayberry has kept a blog at Intel to mark the major milestones in the progress of the silicon replacement program. It’s required reading for those with even a passing interest in the future of microelectronics technology.

Following this theme, there is the obligatory, “Beyond CMOS” session. At ISSCC 2010, this is taking place on Sunday evening in Evening Session 1. Looking back for a moment, it’s interesting to remember that the Solomon’s paper from 2005 closed with the question, “Is it necessary to replace CMOS with anything?”

Of course, if any emerging technology is really going to take hold, there will have to be some new design infrastructure. ISSCC is devoting some time to study how to design real circuits using the devices and technologies presented at venues like IEDM. I’m talking about Session 7, Designing in Emerging Technologies. If you doubt the high-tech focus of this session, just remember the name of one of the organizations presenting here. The Association of Super-Advanced Electronics Technologies based in Yokohama, Japan presents the fourth paper of the session. Interestingly, this paper deviated a bit from the theme since it involves using advanced technologies to build improved test jigs for today’s wafer fab. The IMEC-Qualcomm joint paper in the eighth slot might make you wonder if TSV technology is really ready for mainstream production.

But please don’t take this as a complaint. Unless this is the first time reading one of my articles, you are no doubt painfully aware that CMOS replacement discussions always catch my eye, and I’m glad this one did. Otherwise, I may have never noticed User Customizable Logic Paper (UCLP) with Organic Sea of Transmission Gates (SOTG) Architecture and Ink-Jet Printed Interconnects which is a collaboration between the Univeristy of Tokyo, Mitsubishi Paper Mills and the Max Planck Institute for Solid-State Research in Stuttgart. The authors have apparently developed a method that allows fabrication of custom integrated circuits using that freebee inkjet printer Best Buy threw in when you bought your last PC. We are surely on the verge of the second great electronics hobbyist boom. Can the next Wozniak-Jobs tandem be far behind?

Perhaps the conference organizers have also learned something by looking back. After all, the 2005 panelist predictions pop up on the first page of a Google search for ISSCC 2010. One of the Tuesday evening panels takes a longer view and avoids the conference name. The Semiconductor Industry in 2025 requires more imagination than ISSCC expected from its panelists five years ago. And this year’s won’t show up 15 years from now when my daughter is writing this blog and searching for the 2025 conference program.

Thursday, January 21, 2010

 
 

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